In modern integrated circuit based systems, the need to receive signals at high data rates is challenging. As the data passes through the receiving amplifier, it is filtered by the response of the amplifier and the signal is distorted. One particular type of signal distortion is duty cycle distortion (DCD), which is a measure of how much the average data positive pulse-width differs from the average data negative pulse-width. DCD can become a significant source of timing uncertainty or reduction of timing margin in high speed data links and memory interfaces.